KAIROS — RTL-to-Gates Design Space Exploration
An EDA framework that predicts post-synthesis timing directly from RTL, cutting iterative timing analysis from 28.6 hours to 11 minutes on CVA6 and from 4.4 days to 30 minutes on NVDLA.
Patent filed
I build accelerators — and the tools that build them faster.
Shilin Tian — Ph.D. in Computer Engineering, University of Central Florida (2026)
My research spans hardware/software co-design across the stack: memory-efficient accelerators for AI vision (VITA) and population-scale genomics (PanGaea), and EDA tooling (KAIROS) that predicts RTL timing without full synthesis — cutting iterative timing analysis from days to minutes. I build FPGA data-acquisition systems for photonic computing and biomedical imaging — sustained, real-time capture and processing.
FPGA Systems
Accelerator RTL
EDA & Design Space Exploration
HW/SW Co-Design
Computer Architecture
I’m open to research collaborations and currently seeking full-time job opportunities in hardware and accelerator design, FPGA systems, and EDA. If our interests overlap, I’d be glad to connect.
Research Highlights
Memory-Efficient Accelerators
Hardware/software co-designed accelerators that attack data movement: VITA for 3D human-mesh recovery (DAC 2024), PanGaea for pangenome chaining and alignment (DAC 2026), and TensorPrism for sparse tensor algebra (ISCA 2026).
FPGA Systems for Photonics & Imaging
Custom FPGA platforms for photonics research: the control, training, and ADC-readout system for a floating-point accelerator computing in the optical domain, and an NIH-funded ultrafast deep-tissue imaging system with sustained 16+ Gb/s real-time capture.
News
- Aug 2026Received my Ph.D. in Computer Engineering from the University of Central Florida.
- Jul 2026KAIROS accepted to appear at MICRO 2026, Athens, Greece.
- May 2026Awarded the Dean’s Dissertation Fellowship, UCF.
- Mar 2026TensorPrism accepted to ISCA 2026, Raleigh, NC.
- Mar 2026PanGaea accepted to DAC 2026, Long Beach, CA.
- Feb 2026Started building the FPGA readout system for an NIH-funded ultrafast deep-tissue imaging system.
- Dec 2025Started building the FPGA control, training, and ADC-readout system for a photonic floating-point accelerator.
- Jul 2025Rethinking Tiling (SpMM acceleration) accepted to MICRO 2025, Seoul, South Korea.
- Feb 2024VITA accepted to DAC 2024, San Francisco, CA.
- Aug 2023Polyform accepted to ICCD 2023, Washington, DC.
- Aug 2022Awarded the ORCGS Doctoral Fellowship, UCF.
Publications
KAIROS: Fast Microarchitectural Design Space Exploration by Bridging Architectural Semantics and Logic Gates
PanGaea: A Unified Memory-Efficient Accelerator for Pangenome Chaining and Alignment
TensorPrism: Rethinking Sparse High-order Tensor Acceleration via Co-occurrence Graph
Rethinking Tiling and Dataflow for SpMM Acceleration: A Graph Transformation Framework
Polyform: A Versatile Architecture for Multi-DNN Execution via Spatial and Temporal Acceleration
Awards & Honors
- 2026Dean’s Dissertation Fellowship · University of Central Florida
- 2024Conference Travel Grant · 32nd IEEE FCCM
- 2022ORCGS Doctoral Fellowship · University of Central Florida
Teaching & Service
Graduate Teaching Assistant & Grader · University of Central Florida (May 2023 – Aug 2026)
EGN3211 Engineering Analysis & Computation · EEL3004 Linear Circuits I · EEL3123C Linear Circuits II · EEL4346C Hardware Security & Trusted Circuit Design · EEL4781 Computer Communication Networks
- Conference ReviewerDAC (2024–2026) · ICCAD (2024–2026) · ISPASS (2025–2026) · IPDPS (2024) · MLSys (2026) · ICS (2026)
- Journal ReviewerIEEE TC · IEEE TCAD · IEEE TCAS-I · IEEE TSUSC · Future Generation Computer Systems · Computing (Springer Nature)
- Artifact EvaluationMICRO 2026 Artifact Evaluation Committee
- OutreachProject Lead, Camp Connected Advanced Summer Camp, UCF (2023, 2024) — one-week FPGA computer-vision and ML-security projects with high-school students
- VolunteeringISCA 2023 (Orlando) · IPDPS 2023